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LM98640CVAL Scheda tecnica(PDF) 46 Page - Texas Instruments |
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LM98640CVAL Scheda tecnica(HTML) 46 Page - Texas Instruments |
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46 / 55 page ![]() 46 LM98640QML-SP SNAS461G – MAY 2010 – REVISED NOVEMBER 2018 www.ti.com Product Folder Links: LM98640QML-SP Submit Documentation Feedback Copyright © 2010–2018, Texas Instruments Incorporated 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information Careful consideration should be given to environmental conditions when using a product in a radiation environment. 8.1.1 Total Ionizing Dose Testing and qualification of this product is done according to MIL-STD-883, Test Method 1019. This product is on Texas Instruments' CMOS9X process, a CMOS process shown to be ELDRS-Free. ELDRS report for the process is available upon request. Radiation lot acceptance testing (RLAT) is performed at high dose rate. On some lots the room temperature anneal test is used, with anneal times up to 6 weeks. An RLAT report to the wafer level is available for each lot. 8.1.2 Single Event Latch-Up and Functional Interrupt One time single event latch-up (SEL) and single event functional interrupt (SEFI) testing was preformed according to EIA/JEDEC Standard, EIA/JEDEC57. SEL testing was conducted with the junction temperature at 125°C. The linear energy transfer threshold (LETth) shown in the features list on the front page is the maximum LET tested. A test report is available upon request. 8.1.3 Single Event Effects A report on single event upset (SEU) is available upon request. |
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