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LM98640CVAL Scheda tecnica(PDF) 6 Page - Texas Instruments

Il numero della parte LM98640CVAL
Spiegazioni elettronici  LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output
PDF  55 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments

LM98640CVAL Scheda tecnica(HTML) 6 Page - Texas Instruments

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LM98640QML-SP
SNAS461G – MAY 2010 – REVISED NOVEMBER 2018
www.ti.com
Product Folder Links: LM98640QML-SP
Submit Documentation Feedback
Copyright © 2010–2018, Texas Instruments Incorporated
Pin Functions (continued)
PIN
NAME
I/O(1)
TYP
RES
DESCRIPTION
46
TXOUT0-
O
D
LVDS Data Out0-
47
TXCLK+
O
D
LVDS Clock+
48
TXCLK-
O
D
LVDS Clock-
49
VSS18
P
Digital supply return.
50
VDD18
P
Digital power supply. Decouple with minimum 0.1-µF capacitor to VSS18 plane.
51
ATB0
O
A
Analog Test Bus. If not used, can be connected to VSS18 through a 10-kΩ resistor.
52
ATB1
O
A
Analog Test Bus. If not used, can be connected to VSS18 through a 10-kΩ resistor.
53
VDD18
P
Digital power supply. Decouple with minimum 0.1-µF capacitor to VSS18 plane.
54
VDD18
P
Digital power supply. Decouple with minimum 0.1-µF capacitor to VSS18 plane.
55
VSS18
P
Digital supply return.
56
VSS18
P
Digital supply return.
57
INCLK-
I
D
Clock Input. Inverting input for LVDS clocks.
58
INCLK+
I
D
Clock Input. Non-Inverting input for LVDS clocks.
59
VSS33
P
Analog supply return.
60
VDD33
P
Analog power supply. Decouple with minimum 0.1-µF capacitor to VSS33 plane.
61
VDD33
P
Analog power supply. Decouple with minimum 0.1-µF capacitor to VSS33 plane.
62
VSS33
P
Analog supply return.
63
IBIAS0
I
A
Connect with external 10-kΩ 1% resistor to IBIAS1 pin.
64
IBIAS1
I
A
Connect with external 10-kΩ 1% resistor to IBIAS0 pin.
65
VREFBG
O
A
Band gap reference output. Bypass with a 0.1-µF capacitor to VSS33. Can be overdriven
with external voltage source.
66
VSS33
P
Analog supply return.
67
VREFT1
O
A
Top of ADC reference. Bypass with a 0.1-µF capacitor to VSS33.
68
VREFB1
O
A
Bottom of ADC reference. Bypass with a 0.1-µF capacitor to VSS33.
Exp Pad
P
Exposed pad must be soldered to ground plane to ensure rated performance.



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