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LM98640CVAL Scheda tecnica(PDF) 1 Page - Texas Instruments |
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LM98640CVAL Scheda tecnica(HTML) 1 Page - Texas Instruments |
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1 / 55 page  Digital Control and Config Registers SCLK SDI SDO TXFRM- TXFRM+ TXOUT0- TXOUT0+ TXOUT1- TXOUT1+ TXOUT2- TXOUT2+ TXOUT3- TXCLK- DLL ATG 64 PGA SERIALIZER TXOUT3+ TXCLK+ PGA INTERNAL REFERENCE 14 Bit ADC 14 14 SEN OS1+ OS1- OS2+ OS2- INCLK+ INCLK- Input Bias/ Clamping PGA1[7:0] PGA2[7:0 ] INTERNAL REFERENCE VBG VCLP 14 Bit ADC 5 8 8 VCLP Control[4:0] VCLP Reference DAC 9 COARSE DAC FINE DAC CDAC1[ 8:0] FDAC1[ 8:0] 9 Input Bias/ Clamping CDS S/H + - CDS S/H + - 9 COARSE DAC FINE DAC CDAC2[ 8:0] FDAC2[ 8:0] 9 Product Folder Order Now Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM98640QML-SP SNAS461G – MAY 2010 – REVISED NOVEMBER 2018 LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output 1 1 Features 1 • Radiation Hardened – TID 100 krad(Si) – Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg – Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg – SMD 5962R1820301VXC • ADC Resolution: 14-Bit • ADC Sampling Rate: 5 MSPS to 40 MSPS • Input Level: 2.85 V • Supply Voltages 3.3 V and 1.8 V (Nominal) – 125 mW per Channel at 15 MSPS – 178 mW per Channel at 40 MSPS • CDS or S/H Processing for CCD or CIS Sensors – CDS or S/H Gain 0 dB or 6 dB • Programmable Analog Gain for Each Channel – 256 Steps; Range –3 dB to 18 dB • Programmable Analog Offset Correction – Fine and Coarse DAC Resolution ±8 Bits – Fine DAC Range ±5 mV – Coarse DAC Range ±250 mV • Programmable Input Clamp Voltage • Programmable Sample Edge: 1/64th Pixel Period • INL at 15 MHz: ±3.5 LSB • Noise Floor: –79 dB • Crosstalk: –80 dB • Operating Temp: –55°C to 125°C 2 Applications • Space Satellites Scientific Applications – Focal Plane Electronics – Imaging Attitude Control Systems – Earth Imaging 3 Description The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain. Device Information(1) PART NUMBER GRADE PACKAGE 5962R1820301VXC QMLV RHA (SMD part) [100 krad(Si)] CQFP (68) LM98640W-MLS Flight RHA (non-SMD part) [100 krad(Si)] CQFP (68) LM96840W-MPR Engineering Samples(2) CQFP (68) LM98640CVAL Ceramic Evaluation Board EVM (1) For all available packages, see the orderable addendum at the end of the data sheet. (2) These units are intended for engineering evaluation only. They are processed to a noncompliant flow. These units are not suitable for qualification, production, radiation testing or flight use. Part are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life. |
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