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LM98640CVAL Scheda tecnica(PDF) 7 Page - Texas Instruments

Il numero della parte LM98640CVAL
Spiegazioni elettronici  LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output
PDF  55 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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LM98640CVAL Scheda tecnica(HTML) 7 Page - Texas Instruments

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LM98640QML-SP
www.ti.com
SNAS461G – MAY 2010 – REVISED NOVEMBER 2018
Product Folder Links: LM98640QML-SP
Submit Documentation Feedback
Copyright © 2010–2018, Texas Instruments Incorporated
(1)
All voltages are measured with respect to VSS = 0 V, unless otherwise specified.
(2)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate
conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed test conditions. Operation of the device beyond the
Recommended Operating Conditions is not recommended
(3)
When the input voltage (VIN) at any pin exceeds the power supplies (VIN < VSS or VIN > VDD33), the current at that pin should be
limited to 25 mA. The 50-mA maximum package input current rating limits the number of pins that can simultaneously safely exceed the
power supplies with an input current of 25 mA to two.
6
Specifications
6.1 Absolute Maximum Ratings
(1) (2)
PARAMETER
MIN
MAX
UNIT
Supply Voltage (VDD33)
4.2
V
Supply Voltage (VDD18)
2.35
V
Voltage on any VDD33 Input Pin
(Not to exceed 4.2 V)
–0.3
VDD33 + 0.3
V
Voltage on any VDD33 Output Pin
(Not to exceed 4.2 V)
–0.3
VDD33 + 0.3
V
Voltage on any VDD18 Input or Output Pin (33 to 52)
(Not to exceed 2.35 V)
–0.3
VDD18 + 0.3
V
Input Current at any pin other than Supply Pins(3)
±25
mA
Package Input Current (except Supply Pins) (3)
±50
mA
Maximum Junction Temperature (TA)
150
°C
Storage Temperature
–65
150
°C
(1)
Human body model is 100-pF capacitor discharged through a 1.5-kΩ resistor. Machine model is 220-pF discharged through 0 Ω.
(2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2500 V may actually have higher performance.
(3)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±250 V may actually have higher performance.
6.2 ESD Ratings
(1)
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(2)
±2500
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(3)
±250
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions. Operation of the device beyond the Operating Ratings is not
recommended.
(2)
All voltages are measured with respect to VSS = 0 V, unless otherwise specified.
(3)
When the input voltage (VIN) at any pin exceeds the power supplies (VIN < VSS or VIN > VDD33), the current at that pin should be
limited to 25 mA. The 50-mA maximum package input current rating limits the number of pins that can simultaneously safely exceed the
power supplies with an input current of 25 mA to two.
6.3 Recommended Operating Conditions
(1)
PARAMETER
MIN
MAX
UNIT
Operating Temperature (TA)
–55
125
°C
VDD33(2)(3)
3.15
3.45
V
VDD18(2)(3)
1.7
1.9
V
| VSS33 - VSS18 |
100
mV



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