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LM98640CVAL Scheda tecnica(PDF) 8 Page - Texas Instruments |
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LM98640CVAL Scheda tecnica(HTML) 8 Page - Texas Instruments |
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8 / 55 page ![]() 8 LM98640QML-SP SNAS461G – MAY 2010 – REVISED NOVEMBER 2018 www.ti.com Product Folder Links: LM98640QML-SP Submit Documentation Feedback Copyright © 2010–2018, Texas Instruments Incorporated (1) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD = (T JMAX – T A) / θJA. The values for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Such conditions should always be avoided (2) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6.4 Thermal Information (1) THERMAL METRIC(2) LM98640QML-SP UNIT NBB (CFP) 68 PINS RθJA Junction-to-ambient thermal resistance 16.4 °C/W RθJC(top) Junction-to-case (top) thermal resistance 3.8 RθJB Junction-to-board thermal resistance 7.6 ψJT Junction-to-top characterization parameter 1.7 ψJB Junction-to-board characterization parameter 7.2 RθJC(bottom) Junction-to-case (bottom) thermal resistance 0.3 6.5 Quality Conformance Inspection MIL-STD-883, Method 5005 - Group A SUBGROUP DESCRIPTION TEMP (°C) 1 Static tests at 25 2 Static tests at 125 3 Static tests at –55 4 Dynamic tests at 25 5 Dynamic tests at 125 6 Dynamic tests at –55 7 Functional tests at 25 8A Functional tests at 125 8B Functional tests at –55 9 Switching tests at 25 10 Switching tests at 125 11 Switching tests at –55 12 Setting time at 25 13 Setting time at 125 14 Setting time at –55 |
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