H8SSLASH2214 datasheet(641/936 Pages) RENESAS

641 / 936 page

Section 15 ROM

Rev.4.00 Sep. 18, 2008 Page 581 of 872

REJ09B0189-0400

H'000000

H'000400

H'000800

H'000C00

H'001000

H'01FFFF

Flash memory

EB4 to EB9

EB0

EB1

EB2

EB3

H'FFD000

H'FFD3FFF

On-chip RAM

This area can be accessed

from both the RAM area

and flash memory area

Figure 15.18 Example of RAM Overlap Operation

Example in which Flash Memory Block Area EB0 is Overlapped

1. Set bits RAMS, RAM1 to RAM0 in RAMER to 1, 0, 0, 0, to overlap part of RAM onto the

area (EB0) for which real-time programming is required.

2. Real-time programming is performed using the overlapping RAM.

3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.

4. The data written in the overlapping RAM is written into the flash memory space (EB0).

Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks

regardless of the value of RAM1 to RAM0 (emulation protection). In this state, setting

the P1 or E1 bit in flash memory control register 1 (FLMCR1), will not cause a

transition to program mode or erase mode. When actually programming or erasing a

flash memory area, the RAMS bit should be cleared to 0.

2. A RAM area cannot be erased by execution of software in accordance with the erase

algorithm while flash memory emulation in RAM is being used.

3. Block area EB0 contains the vector table. When performing RAM emulation, the

vector table is needed in the overlap RAM.

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