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H8S/2214 Scheda tecnica(PDF) 637 Page - Renesas Technology Corp

Il numero della parte H8S/2214
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2214 Scheda tecnica(HTML) 637 Page - Renesas Technology Corp

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Section 15 ROM
Rev.4.00 Sep. 18, 2008 Page 577 of 872
REJ09B0189-0400
15.10.2
Software Protection
Software protection can be implemented by setting the SWE1 bit in FLMCR1, erase block register
1 (EBR1), erase block register 2 (EBR2), and the RAMS bit in the RAM emulation register
(RAMER). When software protection is in effect, setting the P1 or E1 bit in flash memory control
register 1 (FLMCR1), does not cause a transition to program mode or erase mode. (See table
15.11.)
Table 15.11 Software Protection
Functions
Item
Description
Program
Erase
SWE bit protection
• Setting bit SWE1 in FLMCR1 to 0 will
place area H'000000 to H'01FFFF in the
program/erase-protected state. (Execute
the program in the on-chip RAM, external
memory)
Yes
Yes
Block specification
protection
• Erase protection can be set for individual
blocks by settings in erase block register 1
(EBR1) and erase block register 2 (EBR2).
• Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
—
Yes
Emulation protection
• Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all
blocks in the program/erase-protected
state.
Yes
Yes



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