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H8S/2214 Scheda tecnica(PDF) 639 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 639 Page - Renesas Technology Corp |
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639 / 936 page ![]() Section 15 ROM Rev.4.00 Sep. 18, 2008 Page 579 of 872 REJ09B0189-0400 Figure 15.16 shows the flash memory state transition diagram. RD VF PR ER FLER = 0 Error occurrence RES = 0 or HSTBY = 0 RES = 0 or HSTBY = 0 RD VF PR ER FLER = 0 Program mode Erase mode Reset or standby (hardware protection) RD VF PR ER FLER = 1 RD VF PR ER FLER = 1 Error protection mode Error protection mode (software standby) Software standby mode FLMCR1, FLMCR2, (except bit FLER) EBR1, EBR2 initialization state FLMCR1, FLMCR2, EBR1, EBR2 initialization state Software standby mode release RD: Memory read possible VF: Verify-read possible PR: Programming possible ER: Erasing possible RD: Memory read not possible VF: Verify-read not possible PR: Programming not possible ER: Erasing not possible Legend: RES = 0 or HSTBY = 0 Error occurrence (software standby) Figure 15.16 Flash Memory State Transitions |
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