H8SSLASH2214 datasheet(642/936 Pages) RENESAS

642 / 936 page

Section 15 ROM

Rev.4.00 Sep. 18, 2008 Page 582 of 872

REJ09B0189-0400

15.12

Interrupt Handling when Programming/Erasing Flash Memory

All interrupts, including NMI interrupt is disabled when flash memory is being programmed or

erased (when the P1 or E1 bit is set in FLMCR1), and while the boot program is executing in boot

mode*

1, to give priority to the program or erase operation. There are three reasons for this:

1. Interrupt during programming or erasing might cause a violation of the programming or

erasing algorithm, with the result that normal operation could not be assured.

2. In the interrupt exception handling sequence during programming or erasing, the vector would

not be read correctly*

2, possibly resulting in MCU runaway.

3. If interrupt occurred during boot program execution, it would not be possible to execute the

normal boot mode sequence.

For these reasons, in on-board programming mode alone there are conditions for disabling

interrupt, as an exception to the general rule. However, this provision does not guarantee normal

erasing and programming or MCU operation. All requests, including NMI interrupt, must

therefore be restricted inside and outside the MCU when programming or erasing flash memory.

NMI interrupt is also disabled in the error-protection state while the P1 or E1 bit remains set in

FLMCR1.

Notes: 1. Interrupt requests must be disabled inside and outside the MCU until the programming

control program has completed programming.

2. The vector may not be read correctly in this case for the following two reasons:

•

If flash memory is read while being programmed or erased (while the P1 or E1 bit

is set in FLMCR1), correct read data will not be obtained (undetermined values will

be returned).

•

If the interrupt entry in the vector table has not been programmed yet, interrupt

exception handling will not be executed correctly.

15.13

Flash Memory Programmer Mode

Programs and data can be written and erased in programmer mode as well as in the on-board

programming modes. In programmer mode, flash memory read mode, auto-program mode, auto-

erase mode, and status read mode are supported. In auto-program mode, auto-erase mode, and

status read mode, a status polling procedure is used, and in status read mode, detailed internal

signals are output after execution of an auto-program or auto-erase operation.

In programmer mode, set the mode pins to programmer mode (see table 15.12) and input a 12

MHz input clock.

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