H8SSLASH2214 datasheet(663/936 Pages) RENESAS

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Section 15 ROM

Rev.4.00 Sep. 18, 2008 Page 603 of 872

REJ09B0189-0400

Period during which flash memory access is prohibited

(x: Wait time after setting SWE bit)*

Period during which flash memory can be programmed

(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)

VCC

FWE

tOSC1

Min. 0

μs

tMDS

tMDS*

tRESW

MD2 to MD0

RES

SWE1 bit

Mode

change*

Mode

change*

Boot

mode

User

mode

User program mode

SWE

set

SWE

cleared

User

mode

User program

mode

Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be

carried out by means of

RES input. The state of ports with multiplexed address functions and bus control output

pins (

AS, RD, WR) will change during this switchover interval (the interval during which the RES pin input is

low), and therefore these pins should not be used as output signals during this time.

2. When making a transition from boot mode to another mode, a mode programming setup time tMDS (min.) of 200

ns is necessary with respect to

RES clearance timing.

3. See section 18.6, Flash Memory Characteristics.

Figure 15.31 Mode Transition Timing

(Example: Boot Mode

→ User Mode ↔ User Program Mode)

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