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H8S/2214 Scheda tecnica(PDF) 806 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 806 Page - Renesas Technology Corp |
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806 / 936 page ![]() Appendix B Internal I/O Register Rev.4.00 Sep. 18, 2008 Page 746 of 872 REJ09B0189-0400 CRA—DTC Transfer Count Register A H'EBC0 to H'EFBF DTC 15 14 13 12 11 10 9 8 76543210 CRAH CRAL Bit Initial value : : — Unde- fined R/W : — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined Specifies the number of DTC data transfers CRB—DTC Transfer Count Register B H'EBC0 to H'EFBF DTC 15 14 13 12 11 10 9 8 76543210 Bit Initial value : : — — — — —— — — —— — — —— — — Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined R/W : Specifies the number of DTC block data transfers DADR0—D/A Data Register 0 H'FDAC D/A 7 0 R/W 6 0 R/W 5 0 R/W 4 0 R/W 3 0 R/W 0 0 R/W 2 0 R/W 1 0 R/W Bit Initial value R/W : : : Stores data for D/A conversion |
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