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H8S/2224 Scheda tecnica(PDF) 416 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 416 Page - Renesas Technology Corp |
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416 / 1071 page ![]() Section 10 I/O Ports Rev. 5.00 Aug 08, 2006 page 330 of 982 REJ09B0054-0500 10.6.6 Pin Functions Port A pins also function as an address output pin and SCI_2* I/O pins. The relationship between the value of register and pin is shown as below. Note: * Not available in the H8S/2227 Group. • PA3/A19/SCK2 The pin functions are switched as shown below according to the combination of operating mode, AE3 to AE0 bits in PFCR, the C/A in SMR_2 of SCI_2*2, CKE1 and CKE0 bits in SCR_2, and the PA3DDR bit. Operating mode Modes 4 to 6 AE3 to AE0 B'11xx Other than B'11xx CKE1 01 C/ A*2 01 — CKE0 01 — — PA3DDR 01 — — — Pin functions A19 output pin PA3 input pin PA3 output pin* 1 SCK2* 2 output pin* 1 SCK2* 2 output pin* 1 SCK2* 2 input pin Operating mode Mode 7 AE3 to AE0 CKE1 0 1 C/ A*2 01 CKE0 0 1 PA3DDR 0 1 Pin functions PA3 input pin PA3 output pin* 1 SCK2* 2 output pin* 1 SCK2* 2 output pin* 1 SCK2* 2 input pin Notes: 1. When PA3ODR in PAODR is set to 1, the corresponding pin functions as NMOS open drain output. 2. Not available in the H8S/2227 Group. |
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