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H8S/2224 Scheda tecnica(PDF) 417 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 417 Page - Renesas Technology Corp |
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417 / 1071 page ![]() Section 10 I/O Ports Rev. 5.00 Aug 08, 2006 page 331 of 982 REJ09B0054-0500 • PA2/A18/RxD2 The pin functions are switched as shown below according to the combination of operating mode, AE3 to AE0 bits in PFCR, the RE bit in SCR_2 of SCI_2*2, and the PA2DDR bit. Operating mode Modes 4 to 6 Mode 7 AE3 to AE0 B'1011 or B'11xx Other than (B'1011 or B'11xx) RE* 2 01 01 PA2DDR 01 01 Pin functions A18 output pin PA2 input pin PA2 output pin* 1 RxD2* 2 input pin PA2 input pin PA2 output pin* 1 RxD2* 2 input pin Notes: 1. When PA2ODR in PAODR is set to 1, the corresponding pin functions as NMOS open drain output. 2. Not available in the H8S/2227 Group. • PA1/A17/TxD2 The pin functions are switched as shown below according to the combination of operating mode, AE3 to AE0 bits in PFCR, the TE bit in SCR_2 of SCI_2*2, and the PA1DDR bit. Operating mode Modes 4 to 6 Mode 7 AE3 to AE0 B'101x or B'11xx Other than (B'101x or B'11xx) TE* 2 01 0 1 PA1DDR 01 01 Pin functions A17 output pin PA1 input pin PA1 output pin* 1 TxD2* 2 output pin* 1 PA1 input pin PA1 output pin* 1 TxD2* 2 output pin* 1 Notes: 1. When PA1ODR in PAODR is set to 1, the corresponding pin functions as NMOS open drain output. 2. Not available in the H8S/2227 Group. |
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