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H8S/2224 Scheda tecnica(PDF) 545 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 545 Page - Renesas Technology Corp

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Section 12 8-Bit Timers
Rev. 5.00 Aug 08, 2006 page 459 of 982
REJ09B0054-0500
12.8
Usage Notes
12.8.1
Contention between TCNT Write and Clear
If a timer counter clock pulse is generated during the T2 state of a TCNT write cycle, the clear
takes priority, so that the counter is cleared and the write is not performed. Figure 12.10 shows this
operation.
φ
Address
TCNT address
Internal write signal
Counter clear signal
TCNT
N
H'00
T1
T2
TCNT write cycle by CPU
Figure 12.10 Contention between TCNT Write and Clear
12.8.2
Contention between TCNT Write and Increment
If a timer counter clock pulse is generated during the T2 state of a TCNT write cycle, the write
takes priority and the counter is not incremented. Figure 12.11 shows this operation.



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