H8SSLASH2224 datasheet(560/1071 Pages) RENESAS

Il numero della parte	H8S/2224

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 13 Watchdog Timer (WDT)

Rev. 5.00 Aug 08, 2006 page 474 of 982

REJ09B0054-0500

TCNT value

H'00

Time

H'FF

WT/

IT=1

TME=1

Write H'00'

to TCNT

WT/

IT=1

TME=1

Write H'00'

to TCNT

518 system clock (WDT0)

515/516 system clock (WDT1)

Internal reset signal*

WT/

IT:

TME:

WOVF:

Note: * In the case of WDT_0, the internal reset signal is generated only when the RSTE bit is set to 1.

In the case of WDT_1,either the internal reset or the NMI interrupt is generated.

Overflow

internal reset is

generated

WOVF=1

Timer mode select bit

Timer enable bit

Overflow flag

Legend:

Figure 13.2 Watchdog Timer Mode Operation

13.4.2 Interval Timer Mode

To use the WDT as a watchdog timer, set the WT/

IT and TME bits in TCSR to 1.

When the WDT is used as an interval timer, an interval timer interrupt (WOVI) is generated each

time the TCNT overflows. (The NMI interrupt is not generated.) Therefore, an interrupt can be

generated at intervals.

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