H8SSLASH2224 datasheet(691/1071 Pages) RENESAS

691 / 1071 page

Section 15 Serial Communication Interface (SCI)

Rev. 5.00 Aug 08, 2006 page 605 of 982

REJ09B0054-0500

<End>

[1]

Yes

Initialization

Start transmission

Read TDRE flag in SSR

[2]

Write transmit data to TDR and

clear TDRE flag in SSR to 0

Yes

Read TEND flag in SSR

[3]

Clear TE bit in SCR to 0

TDRE = 1

All data transmitted?

TEND = 1

[1] SCI initialization:

The TxD pin is automatically

designated as the transmit data output

pin.

[2] SCI status check and transmit data

write:

Read SSR and check that the TDRE

flag is set to 1, then write transmit data

to TDR and clear the TDRE flag to 0.

[3] Serial transmission continuation

procedure:

To continue serial transmission, be

sure to read 1 from the TDRE flag to

confirm that writing is possible, then

write data to TDR, and then clear the

TDRE flag to 0.

Checking and clearing of the TDRE

flag is automatic when the DMAC*

1 or

the DTC*

2 is activated by a transmit

data empty interrupt (TXI) request and

data is written to TDR.

Notes: 1. Supported only by the

H8S/2239 Group.

2. The case, in which the DTC

automatically clears the TDRE

flag, occurs only when DISEL in

DTC is 0 with the transfer

counter not being 0. Therefore,

the TDRE flag should be

cleared by CPU when DISEL is

1, or when DISEL is 0 with the

transfer counter being 0.

Figure 15.20 Sample Serial Transmission Flowchart

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