H8SSLASH2224 datasheet(693/1071 Pages) RENESAS

693 / 1071 page

Section 15 Serial Communication Interface (SCI)

Rev. 5.00 Aug 08, 2006 page 607 of 982

REJ09B0054-0500

Yes

<End>

[1]

Initialization

Start reception

[2]

Yes

Read RDRF flag in SSR

[4]

[5]

Clear RE bit in SCR to 0

Error processing

(Continued below)

[3]

Read receive data in RDR, and

clear RDRF flag in SSR to 0

Yes

ORER = 1

RDRF = 1

All data received?

Read ORER flag in SSR

<End>

Error processing

Overrun error processing

Clear ORER flag in SSR to 0

[3]

[1] SCI initialization:

The RxD pin is automatically

designated as the receive data input

pin.

[2] [3] Receive error processing:

If a receive error occurs, read the

ORER flag in SSR, and after

performing the appropriate error

processing, clear the ORER flag to 0.

Transfer cannot be resumed if the

ORER flag is set to 1.

[4] SCI status check and receive data

read:

Read SSR and check that the RDRF

flag is set to 1, then read the receive

data in RDR and clear the RDRF flag

to 0.

Transition of the RDRF flag from 0 to 1

can also be identified by an RXI

interrupt.

[5] Serial reception continuation

procedure:

To continue serial reception, before

the final bit of the current frame is

received, reading the RDRF flag,

reading RDR, and clearing the RDRF

flag to 0 should be finished. The

RDRF flag is cleared automatically

when the DMAC*

1 or the DTC*2 is

activated by a receive data full

interrupt (RXI) request and the RDR

value is read.

Notes: 1. Supported only by the H8S/2239

Group.

2. The case, in which the DTC

automatically clears the RDRF

flag, occurs only when DISEL in

DTC is 0 with the transfer

counter not being 0. Therefore,

the RDRF flag should be

cleared by CPU when DISEL is

1, or when DISEL is 0 with the

transfer counter being 0.

Figure 15.22 Sample Serial Reception Flowchart

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