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H8S/2224 Scheda tecnica(PDF) 740 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 740 Page - Renesas Technology Corp

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Section 16 I
2C Bus Interface (IIC) (Option)
Rev. 5.00 Aug 08, 2006 page 654 of 982
REJ09B0054-0500
S
SLA
R/
W
A
DATA
A
A/
A
P
11
1
1
n
7
1
m
(a) I2C bus format (FS = 0 or FSX = 0)
(b) I2C bus format (start condition retransmission, FS = 0 or FSX = 0)
n: transfer bit count
(n = 1 to 8)
m: transfer frame count
(m
≥ 1)
S
SLA
R/
W
A
DATA
11
1
n1
7
1
m1
S
SLA
R/
W
A
DATA
A/
A
P
11
1
n2
7
1
m2
11
1
A/
A
n1 and n2: transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: transfer frame count (m1 and m2
≥ 1)
11
Figure 16.3 I2C Bus Data Formats (I2C Bus Formats)
S
DATA
DATA
P
11
n
8
1
m
FS = 1 and FSX = 1
n: transfer bit count
(n = 1 to 8)
m: transfer frame count
(m
≥ 1)
Figure 16.4 I2C Bus Data Format (Serial Format)
SDA
SCL
S
1 to 7
SLA
8
R/
W
9
A
1 to 7
DATA
8
9
1 to 7
8
9
A
DATA
P
A/
A
Figure 16.5 I2C Bus Timing
Legend:
S:
Start condition. The master device drives SDA from high to low while SCL is high
SLA:
Slave address
R/
W:
Indicates the direction of data transfer: from the slave device to the master device when
R/
W is 1, or from the master device to the slave device when R/W is 0
A:
Acknowledge. The receiving device drives SDA
DATA: Transferred data
P:
Stop condition. The master device drives SDA from low to high while SCL is high



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