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H8S/2224 Scheda tecnica(PDF) 745 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 745 Page - Renesas Technology Corp

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Section 16 I
2C Bus Interface (IIC) (Option)
Rev. 5.00 Aug 08, 2006 page 659 of 982
REJ09B0054-0500
16.4.4
Master Receive Operation
In I2C bus format master receive mode, the master device outputs the receive clock, receives data,
and returns an acknowledge signal. The slave device transmits data.
The master device transmits the data containing the slave address + R/
W (0: read) in the 1st frame
after a start condition is generated in the master transmit mode. After the slave device is selected
the switch to receive operation takes place.
(1) Receive Operation Using Wait States
Figures 16.10 and 16.11 are flowcharts showing examples of the master receive mode (WAIT =
1).



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