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H8S/2224 Scheda tecnica(PDF) 767 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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H8S/2224 Scheda tecnica(HTML) 767 Page - Renesas Technology Corp

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Section 16 I
2C Bus Interface (IIC) (Option)
Rev. 5.00 Aug 08, 2006 page 681 of 982
REJ09B0054-0500
8. Notes on Start Condition Issuance for Retransmission
Depending on the timing combination with the start condition issuance and the subsequently
writing data to ICDR, it may not be possible to issue the retransmission and the data
transmission after retransmission condition issuance.
After start condition issuance is done and determined the start condition, write the transmit
data to ICDR, as shown below. Figure 16.22 shows the timing of start condition issuance for
retransmission, and the timing for subsequently writing data to ICDR, together with the
corresponding flowchart.
SDA
IRIC
SCL
ACK
Bit 7
Data output
[3] (Restart) Start condition instruction issuance
[4] IRIC determination
[5] ICDR write (next transmit data)
[2] Detemination of SCL = Low
[1] IRIC determination
Start condition
(retransmission)
IRIC = 1?
Yes
Clear IRIC in ICSR
Read SCL pin
Write transmit data to ICDR
Write BBSY = 1,
SCP = 0 (ICSR)
[1]
[1] Wait for end of 1-byte transfer
[2] Determine whether SCL is low
[3] Issue restart condition instruction for transmission
[4] Determine whether start condition is generated or not
[5] Set transmit data (slave address + R/
W)
[2]
[3]
[4]
[5]
Yes
Yes
No
No
IRIC = 1?
Yes
SCL = Low?
Start condition
issuance?
No
No
Other processing
Note: Program so that processing from [3] to [5]
is executed continuously.
9
Figure 16.22 Flowchart and Timing of Start Condition Instruction Issuance for
Retransmission



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