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H8S/2224 Scheda tecnica(PDF) 815 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 815 Page - Renesas Technology Corp

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Section 20 Flash Memory (F-ZTAT Version)
Rev. 5.00 Aug 08, 2006 page 729 of 982
REJ09B0054-0500
• 128-kbyte Flash Memory
Bit
Bit Name Initial Value R/W
Description
7 to 2 —
All 0
R/W
Reserved
Initial values should not be changed.
1
EB9
0
R/W
When this bit is set to 1, 32 kbytes of EB9
(H'018000 to H'01FFFF) will be erased.
0
EB8
0
R/W
When this bit is set to 1, 32 kbytes of EB8
(H'010000 to H'017FFF) will be erased.
20.5.5
RAM Emulation Register (RAMER)
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER settings should be made in user mode or user
program mode. To ensure correct operation of the emulation function, the ROM for which RAM
emulation is performed should not be accessed immediately after this register has been modified.
Normal execution of an access immediately after register modification is not guaranteed.
Bit
Bit Name Initial Value R/W
Description
7 to 5 —
All 0
R
Reserved
These bits are always read as 0.
4—
0
R/W
Reserved
Only 0 should be written to this bit.
3
RAMS
0
R/W
RAM Select
Specifies selection or non-selection of flash memory
emulation in RAM. When RAMS = 1, the flash memory is
overlapped with part of RAM, and all flash memory block
are program/erase-protected.



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