H8SSLASH2224 datasheet(818/1071 Pages) RENESAS

818 / 1071 page

Section 20 Flash Memory (F-ZTAT Version)

Rev. 5.00 Aug 08, 2006 page 732 of 982

REJ09B0054-0500

Bit

Bit Name Initial Value R/W

Description

FLSHE

R/W

Flash Memory Control Register Enable

Controls for the CPU accessing to the control registers

(FLMCR1, FLMCR2, EBR1, EBR2) of the flash memory.

When this bit is set to 1, the flash memory control

registers can be read/written to. When this bit is cleared

to 0, the flash memory control registers are not selected.

At this time, the contents of the flash memory control

registers are retained.

0: Area at H'FFFFA8 to H'FFFFAC not selected for the

flash memory control registers.

1: Area at H'FFFFA8 to H'FFFFAC selected for the flash

memory control registers.

2 to 0 —

All 0

R/W

Reserved

Only 0 should be written to these bits.

20.6

On-Board Programming Modes

When pins are set to on-board programming mode, program/erase/verify operations can be

performed on the on-chip flash memory. There are two on-board programming modes: boot mode

and user program mode. The pin settings for transition to each of these modes are shown in table

20.3. For a diagram of the transitions to the various flash memory modes, see figure 20.2.

Table 20.3 Setting On-Board Programming Modes

Mode Setting

FWE

MD2

MD1

MD0

Boot mode

Extended mode

Single-chip mode

User program mode

Extended mode

Single-chip mode

20.6.1

Boot Mode

Table 20.4 shows the boot mode operations between reset end and branching to the programming

control program.

1. When boot mode is used, the flash memory programming control program must be prepared in

the host beforehand. Prepare a programming control program in accordance with the

description in section 20.8, Flash Memory Programming/Erasing.

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