H8SSLASH2224 datasheet(825/1071 Pages) RENESAS

825 / 1071 page

Section 20 Flash Memory (F-ZTAT Version)

Rev. 5.00 Aug 08, 2006 page 739 of 982

REJ09B0054-0500

START

End of programming

Set SWE1 bit in FLMCR1

Start of programming

Write pulse application subroutine

Wait (tsswe) 1 µs

Sub-Routine Write Pulse

End Sub

Set PSU1 bit in FLMCR1

WDT enable

Disable WDT

Number of Writes n

998

999

1000

Note: 6. Write Pulse Width

Write Time

(tsp30/tsp200)

µs

200

Wait (tspsu) 50 µs

Set P1 bit in FLMCR1

Wait tsp10 or tsp30 or tsp200

Clear P1 bit in FLMCR1

Wait (tcp) 5 µs

Clear PSU1 bit in FLMCR1

Wait (tcpsu) 5 µs

n = 1

m = 0

Yes

Wait (tspv) 4 µs

Start of programming

End of programming

Wait (tcpv) 2 µs

Apply Write pulse tsp30 or tsp200

Sub-Routine-Call

Set PV1 bit in FLMCR1

H'FF dummy write to verify address

Read verify data

Write data =

verify data?

Transfer reprogram data to reprogram data area

Reprogram data computation

Transfer additional-programming data to

additional-programming data area

Additional-programming data computation

Clear PV1 bit in FLMCR1

Clear SWE1 bit in FLMCR1

m = 1

Reprogram

See Note 6 for pulse width

m = 0 ?

Increment address

Programming failure

Yes

Clear SWE1 bit in FLMCR1

Wait (tcswe) 100 µs

Yes

≥ n?

Yes

≥ n ?

Wait (tcswe) 100 µs

≥ 1000?

← n + 1

Original Data

(D)

Verify Data

(V)

Reprogram Data

(X)

Comments

Programming completed

Still in erased state; no action

Programming incomplete;

reprogram

Note: Use a 10

µs write pulse for additional programming.

Write 128-byte data in RAM reprogram

data area consecutively to flash memory

RAM

Program data storage

area (128 bytes)

Reprogram data storage

area (128 bytes)

Additional-programming

data storage area

(128 bytes)

Store 128-byte program data in program

data area and reprogram data area

Apply Write Pulse (Additional programming) 10

µs

Sub-Routine-Call

128-byte

data verification completed?

Successively write 128-byte data from additional-

programming data area in RAM to flash memory

Reprogram Data Computation Table

Reprogram Data

(X')

Verify Data

(V)

Additional-

Programming Data (Y)

Comments

Additional programming

to be executed

Additional programming

not to be executed

Additional programming

not to be executed

Additional programming

not to be executed

Additional-Programming Data Computation Table

Perform programming in the erased state.

Do not perform additional programming

on previously programmed addresses.

Notes: 1. Data transfer is performed by byte transfer. The lower 8 bits of the first address written to must be H'00 or H'80.

A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this case, H'FF data must be written to the extra addresses.

2. Verify data is read in 16-bit (word) units.

3. Reprogram data is determined by the operation shown in the table below (comparison between the data stored in the program data area and the verify data). Bits for

which the reprogram data is 0 are programmed in the next reprogramming loop. Therefore, even bits for which programming has been completed will be subjected to

programming once again if the result of the subsequent verify operation is NG.

4. A 128-byte area for storing program data, a 128-byte area for storing reprogram data, and a 128-byte area for storing additional data must be provided in RAM.

The contents of the reprogram data area and additional data area are modified as programming proceeds.

5. A write pulse of 30

µs or 200 µs is applied according to the progress of the programming operation. See Note *6 for details of the pulse widths. When writing of

additional-programming data is executed, a 10

µs write pulse should be applied. Reprogram data X' means reprogram data when the write pulse is applied.

Wait (tspvr) 2 µs

Figure 20.11 Program/Program-Verify Flowchart

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