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H8S/2224 Scheda tecnica(PDF) 822 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 822 Page - Renesas Technology Corp

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Section 20 Flash Memory (F-ZTAT Version)
Rev. 5.00 Aug 08, 2006 page 736 of 982
REJ09B0054-0500
1. Set RAMER to overlap part of RAM onto the area for which real-time programming is
required.
2. Emulation is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, thus releasing the RAM
overlap.
4. The data written in the overlapping RAM is written into the flash memory space.
Start of emulation program
Set RAMER
Write tuning data to overlap
RAM
Execute application program
Tuning OK?
Clear RAMER
Write to flash memory
emulation block
End of emulation program
No
Yes
Figure 20.9 Flowchart for Flash Memory Emulation in RAM
An example in which flash memory block area EB1 is overlapped is shown in figure 20.10.
1. The RAM area to be overlapped is fixed at a 4-kbyte area in the range H'FFD000 to H'FFDFFF
in the 384-kbyte or 256-kbyte flash memory . The RAM area to be overlapped is fixed at a 1-
kbyte area in the range H'FFD000 to H'FFD3FF in the 128-kbyte flash memory.
2. The flash memory area to be overlapped is selected by RAMER from a 4-kbyte area of the
EB0 to EB7 blocks.
3. The overlapped RAM area can be accessed from both the flash memory addresses and RAM
addresses.



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