H8SSLASH2224 datasheet(823/1071 Pages) RENESAS

Il numero della parte	H8S/2224

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 20 Flash Memory (F-ZTAT Version)

Rev. 5.00 Aug 08, 2006 page 737 of 982

REJ09B0054-0500

4. When the RAMS bit in RAMER is set to 1, program/erase protection is enabled for all flash

memory blocks (emulation protection). In this state, setting the P1 or E1 bit in FLMCR1 to 1

does not cause a transition to program mode or erase mode.

5. A RAM area cannot be erased by execution of software in accordance with the erase

algorithm.

6. Block area EB0 contains the vector table. When performing RAM emulation, the vector table

is needed in the overlap RAM.

H'000000

H'001000

H'002000

H'003000

H'FFD000

H'FFDFFF

Flash memory

(EB0)

Flash memory

(EB0)

(EB1)

(EB2)

(EB3)

On-chip RAM

(4 kbytes)

On-chip RAM

(Shadow of

H'FFE000 to

H'FFDFFF)

Flash memory

(EB2)

On-chip RAM

(4 kbytes)

(EB3)

Normal memory map

RAM overlap memory map

Figure 20.10 Example of RAM Overlap Operation

20.8

Flash Memory Programming/Erasing

A software method using the CPU is employed to program and erase flash memory in the on-

board programming modes. Depending on the FLMCR1 setting, the flash memory operates in one

of the following four modes: Program mode, program-verify mode, erase mode, and erase-verify

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