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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S/2224 Scheda tecnica(PDF) 859 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 859 Page - Renesas Technology Corp |
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859 / 1071 page  Section 23 Clock Pulse Generator Rev. 5.00 Aug 08, 2006 page 773 of 982 REJ09B0054-0500 Table 23.3 External Clock Input Conditions (2) (H8S/2238B, H8S/2236B) F-ZTAT Masked ROM VCC = 3.0 V to 5.5 V VCC = 2.7 V to 5.5 V Item Symbol Min Max Min Max Unit Test Conditions External clock input low pulse width tEXL 30 — 30 — ns External clock input high pulse width tEXH 30 — 30 — ns External clock rise time tEXr —7 — 7 ns External clock fall time tEXf —7 — 7 ns Figure 23.5 0.4 0.6 0.4 0.6 tcyc φ ≥ 5 MHz Clock low pulse width tCL 80 — 80 — ns φ < 5 MHz Figure 27.10 tCH 0.4 0.6 0.4 0.6 tcyc φ ≥ 5 MHz Clock high pulse width 80 — 80 — ns φ < 5 MHz Table 23.3 External Clock Input Conditions (3) (H8S/2238R, H8S/2236R) F-ZTAT Masked ROM VCC = 2.7 V to 3.6 V VCC = 2.2 V to 3.6 V Item Symbol Min Max Min Max Unit Test Conditions External clock input low pulse width tEXL 30 — 65 — ns External clock input high pulse width tEXH 30 — 65 — ns External clock rise time tEXr —7 — 15 ns External clock fall time tEXf —7 — 15 ns Figure 23.5 0.4 0.6 0.35 0.65 tcyc φ ≥ 5 MHz Clock low pulse width tCL 80 — 70 — ns φ < 5 MHz Figure 27.10 tCH 0.4 0.6 0.35 0.65 tcyc φ ≥ 5 MHz Clock high pulse width 80 — 70 — ns φ < 5 MHz |
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