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H8S/2224 Scheda tecnica(PDF) 858 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 858 Page - Renesas Technology Corp |
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858 / 1071 page ![]() Section 23 Clock Pulse Generator Rev. 5.00 Aug 08, 2006 page 772 of 982 REJ09B0054-0500 EXTAL XTAL EXTAL XTAL External clock input Open External clock input (a) XTAL pin left open (b) Complementary clock input at XTAL pin Figure 23.4 External Clock Input (Examples) Table 23.3 shows the input conditions for the external clock. Table 23.4 shows the input conditions for the external clock when duty adjustment circuit is not used. Table 23.3 External Clock Input Conditions (1) (H8S/2258 Group) VCC = 4.0 V to 5.5 V Item Symbol Min Max Unit Test Conditions External clock input low pulse width tEXL 30 — ns External clock input high pulse width tEXH 30 — ns External clock rise time tEXr —7 ns External clock fall time tEXf —7 ns Figure 23.5 Clock low pulse width tCL 0.4 0.6 tCYC Clock high pulse width tCH 0.4 0.6 tCYC Figure 27.10 |
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