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H8S/2224 Scheda tecnica(PDF) 984 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 984 Page - Renesas Technology Corp |
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984 / 1071 page ![]() Section 27 Electrical Characteristics Rev. 5.00 Aug 08, 2006 page 898 of 982 REJ09B0054-0500 (2) Control Signal Timing Table 27.31 lists the control signal timing. Table 27.31 Control Signal Timing Condition A (F-ZTAT version): VCC = 3.0 V to 5.5 V, AVCC = 3.6 V to 5.5 V, Vref = 3.6 V to AVCC, VSS = AVSS = 0 V, φ = 32.768 kHz, 2 MHz to 13.5 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications) Condition B (Masked ROM version): VCC = 2.7 V to 5.5 V, AVCC = 3.6 V to 5.5 V, Vref = 3.6 V to AVCC, VSS = AVSS = 0 V, φ = 32.768 kHz, 2 MHz to 13.5 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications) Conditions A, B Item Symbol Min Max Unit Test Conditions RES setup time tRESS 250 ns Figure 27.12 RES pulse width tRESW 20 tcyc MRES setup time tMRESS 250 ns MRES pulse width tMRESW 20 tcyc NMI setup time tNMIS 250 ns Figure 27.13 NMI hold time tNMIH 10 NMI pulse width (exiting software standby mode) tNMIW 200 ns IRQ setup time tIRQS 250 ns IRQ hold time tIRQH 10 ns IRQ pulse width (exiting software standby mode) tIRQW 200 ns |
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