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H8S/2224 Scheda tecnica(PDF) 327 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 327 Page - Renesas Technology Corp |
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327 / 1071 page ![]() Section 8 DMA Controller (DMAC) Rev. 5.00 Aug 08, 2006 page 241 of 982 REJ09B0054-0500 8.5.4 Repeat Mode Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit in DMABCRL to 0. In repeat mode, MAR is updated after each byte or word transfer in response to a single transfer request, and this is executed the number of times specified in ETCRL. On completion of the specified number of transfers, MAR and ETCRL are automatically restored to their original settings and operation continues. One address is specified by MAR, and the other by IOAR. The transfer direction can be specified by the DTDIR bit in DMACR. Table 8.7 summarizes register functions in repeat mode. Table 8.7 Register Functions in Repeat Mode Function Register DTDIR = 0 DTDIR = 1 Initial Setting Operation 23 0 MAR Source address register Destination address register Start address of transfer destination or transfer source Incremented/ decremented every transfer Initial setting is restored when value reaches H'0000 23 0 IOAR 15 H'FF Destination address register Source address register Start address of transfer source or transfer destination Fixed 0 ETCRH 7 Holds number of transfers Number of transfers Fixed 0 ETCRL 7 Transfer counter Number of transfers Decremented every transfer Loaded with ETCRH value when count reaches H'00 MAR specifies the start address of the transfer source or transfer destination as 24 bits. MAR is incremented or decremented by 1 or 2 each time a byte or word is transferred. IOAR specifies the lower 16 bits of the other address. The upper 8 bits of IOAR have a value of H'FF. The number of transfers is specified as 8 bits by ETCRH and ETCRL. The maximum number of transfers, when H'00 is set in both ETCRH and ETCRL, is 256. In repeat mode, ETCRL functions as the transfer counter, and ETCRH is used to hold the number of transfers. ETCRL is decremented by 1 each time a data transfer is executed, and when its value reaches H'00, it is loaded with the value in ETCRH. At the same time, the value set in MAR is |
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