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AD6673 Scheda tecnica(PDF) 14 Page - Analog Devices |
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AD6673 Scheda tecnica(HTML) 14 Page - Analog Devices |
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14 / 46 page ![]() Data Sheet AD6673 Rev. C | Page 13 of 45 Pin No. Mnemonic Type Description Data Outputs 18 SERDOUT1+ Output Lane B CML Output Data—True. 19 SERDOUT1− Output Lane B CML Output Data—Complement. 21 SERDOUT0− Output Lane A CML Output Data—Complement. 22 SERDOUT0+ Output Lane A CML Output Data—True. DUT Controls 10 RST Input Digital Reset (Active Low). 31 SDIO Input/Output SPI Serial Data I/O. 32 SCLK Input SPI Serial Clock. 33 CS Input SPI Chip Select (Active Low). 34 PDWN Input Power-Down Input (Active High). The operation of this pin depends on the SPI mode and can be configured as power- down or standby (see Table 18). |
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