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FS23 Scheda tecnica(PDF) 126 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 126 Page - NXP Semiconductors |
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126 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Inhibit V1 thermal warning interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 13 V1TWARN_M POR Inhibit VMON_EXT overvoltage interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 14 V0OV_M POR Inhibit VMON_EXT undervoltage interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 15 V0UV_M POR Table 92. M_REG_MSK register bit description...continued 22.10 M_REG1_FLG Bit 15 14 13 12 11 10 9 8 Write - - - - - - - - Read - - - - - - - - Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write[1] - - - - - - - V1_OCLS_I Read - - - - - - - V1_OCLS_I Reset 0 0 0 0 0 0 0 0 Table 93. M_REG1_FLG register bit allocation [1] Write 1 in a flag to clear it. Bit Symbol Description Report V1 low side FET overcurrent event (HVBUCK) 0 No event detected 1 V1 low-side OC occurred 0 V1_OCLS_I POR, or clear on write (write '1') Table 94. M_REG1_FLG register bit description 22.11 M_REG1_MSK Bit 15 14 13 12 11 10 9 8 Write - - - - - - - - Read - - - - - - - - Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write - - - - - - - V1_OCLS_M Read - - - - - - - V1_OCLS_M Reset 0 0 0 0 0 0 0 0 Table 95. M_REG1_MSK register bit allocation FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 126 / 230 |
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