7480 datasheet(321/337 Pages) RENESAS

321 / 337 page

Addressing mode

Symbol

Function

Details

IMP

IMM

BIT, A

BIT, ZP

OP n# OP n# OP n# OP n# OP n#

OP n

3-56

3.6 Machine Instructions

7480 Group and 7481 Group User's Manual

APPENDICES

Branches when the contents of overflow flag is

“0”.

Branches when the contents of overflow flag is

“1”.

Clears the contents of the bit specified in the

accumulator or memory to “0”.

Clears the contents of the carry flag to “0”.

Clears the contents of decimal mode flag to

“0”.

Clears the contents of interrupt disable flag to

“0”.

Clears the contents of index X mode flag to

“0”.

Clears the contents of overflow flag to “0”.

Compares the contents of accumulator and

memory.

Compares the contents of the memory speci-

fied by the addressing mode with the contents

of the address indicated by index register X.

Forms a one’s complement of the contents of

memory, and stores it into memory.

Compares the contents of index register X and

memory.

Compares the contents of index register Y and

memory.

Decrements the contents of the accumulator

or memory by 1.

Decrements the contents of index register X

by 1.

Decrements the contents of index register Y

by 1.

Divides the 16-bit data that is the contents of

M (zz + x + 1) for high byte and the contents of

M (zz + x) for low byte by the accumulator.

Stores the quotient in the accumulator and the

1’s complement of the remainder on the stack.

“Exclusive-ORs” the contents of accumulator

and memory. The results are stored in the ac-

cumulator.

“Exclusive-ORs” the contents of the memory

specified by the addressing mode and the

contents of the memory at the address indi-

cated by index register X. The results are

stored into the memory at the address indi-

cated by index register X.

Increments the contents of accumulator or

memory by 1.

Increments the contents of index register X by

Increments the contents of index register Y by

BVC

(Note 4)

BVS

(Note 4)

CLB

CLC

CLD

CLI

CLT

CLV

CMP

(Note 3)

COM

CPX

CPY

DEC

DEX

DEY

DIV

EOR

(Note 1)

INC

INX

INY

V = 0?

V = 1?

Ab or Mb

← 0

When T = 0

A – M

When T = 1

M(X) – M

← M

X – M

Y – M

← A – 1 or

← M – 1

X ← X – 1

Y ← Y – 1

A ← (M(zz + X + 1),

M(zz + X)) / A

M(S)

← 1’s complememt

of Remainder

← S – 1

When T = 0

← A V– M

When T = 1

M(X)

← M(X) V– M

← A + 1 or

← M + 1

← X + 1

← Y + 1

20i

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