7480 datasheet(325/337 Pages) RENESAS

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Addressing mode

Symbol

Function

Details

IMP

IMM

BIT, A

BIT, ZP

OP n# OP n# OP n# OP n# OP n#

OP n

3-60

3.6 Machine Instructions

7480 Group and 7481 Group User's Manual

APPENDICES

Saves the contents of the accumulator in

memory at the address indicated by the stack

pointer and decrements the contents of stack

pointer by 1.

Saves the contents of the processor status

the stack pointer and decrements the contents

of the stack pointer by 1.

Increments the contents of the stack pointer

by 1 and restores the accumulator from the

memory at the address indicated by the stack

pointer.

Increments the contents of stack pointer by 1

and restores the processor status register

from the memory at the address indicated by

the stack pointer.

Shifts the contents of the memory or accumu-

lator to the left by one bit. The high order bit is

shifted into the carry flag and the carry flag is

shifted into the low order bit.

Shifts the contents of the memory or accumu-

lator to the right by one bit. The low order bit is

shifted into the carry flag and the carry flag is

shifted into the high order bit.

Rotates the contents of memory to the right by

4 bits.

Returns from an interrupt routine to the main

routine.

Returns from a subroutine to the main routine.

Subtracts the contents of memory and

complement of carry flag from the contents of

accumulator. The results are stored into the

accumulator.

Subtracts contents of complement of carry flag

and contents of the memory indicated by the

addressing mode from the memory at the ad-

dress indicated by index register X. The

results are stored into the memory of the ad-

dress indicated by index register X.

Sets the specified bit in the accumulator or

memory to “1”.

Sets the contents of the carry flag to “1”.

Sets the contents of the decimal mode flag to

“1”.

Sets the contents of the interrupt disable flag

to “1”.

Sets the contents of the index X mode flag to

“1”.

PHA

PHP

PLA

PLP

ROL

ROR

RRF

RTI

RTS

SBC

(Note 1)

(Note 5)

SEB

SEC

SED

SEI

SET

M(S)

← A

← S – 1

M(S)

← PS

← S – 1

← S + 1

← M(S)

← S + 1

← M(S)

← S + 1

← M(S)

← S + 1

PCL

← M(S)

← S + 1

PCH ← M(S)

← S + 1

PCL ← M(S)

← S + 1

PCH

← M(S)

When T = 0

← A – M – C

When T = 1

M(X)

← M(X) – M – C

Ab or Mb ← 1

C ← 1

D ← 1

I ← 1

T ← 1

←

← C ←

→

20i

C →

→

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