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IS46DR16640C Scheda tecnica(PDF) 20 Page - Integrated Silicon Solution, Inc |
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IS46DR16640C Scheda tecnica(HTML) 20 Page - Integrated Silicon Solution, Inc |
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20 / 49 page ![]() 20 Integrated Silicon Solution, Inc. — www.issi.com Rev. 00A 6/4/2013 IS43/46DR81280C, IS43/46DR16640C Timing parameters by speed grade (DDR2-667 and DDR2-800) cont'd (For information related to the entries in this table, refer to both the Guidelines and the Specific Notes following this Table.) Parameter Symbol DDR2-667 DDR2-800 Units Notes Min. Max Min. Max. Activate to activate command period tRRD x8 7.5 – 7.5 – ns 4,32 x16 10 – 10 – CAS to CAS command delay tCCD 2 – 2 – nCK Write recovery time tWR 15 – 15 – ns 32 Auto precharge write recovery + precharge time tDAL WR + tnRP – WR + tnRP – nCK 33 Internal write to read command delay tWTR 7.5 – 7.5 – ns 24, 32 Internal read to precharge command delay tRTP 7.5 – 7.5 – ns 3, 32 CKE minimum pulse width (HIGH and LOW pulse width) tCKE 3 – 3 – nCK 27 Exit self refresh to a non-read command tXSNR tRFC + 10 – tRFC + 10 – ns 32 Exit self refresh to a read command tXSRD 200 – 200 – nCK Exit precharge power down to any command tXP 2 – 2 – nCK Exit active power down to read command tXARD 2 – 2 – nCK 1 Exit active power down to read command (slow exit, lower power) tXARDS 7 - AL – 8 - AL – nCK 1, 2 ODT turn-on delay tAOND 2 2 2 2 nCK 16 ODT turn-on tAON tAC, min tAC,max + 0.7 tAC,min tAC,max + 0.7 ns 6, 16, 40 ODT turn-on (Power-Down mode) tAONPD tAC, min + 2 2 x tCK(avg) + tAC,max + 1 tAC,min + 2 2 x tCK(avg) + tAC,max + 1 ns ODT turn-off delay tAOFD 2.5 2.5 2.5 2.5 nCK 17, 45 ODT turn-off tAOF tAC, min tAC,max + 0.6 tAC,min tAC,max + 0.6 ns 17, 43, 45 ODT turn-off (Power-Down mode) tAOFPD tAC, min+2 2.5 x tCK(avg) + tAC,max + 1 tAC,min+2 2.5 x tCK(avg) + tAC,max + 1 ns ODT to power down entry latency tANPD 3 – 3 – nCK ODT Power Down Exit Latency tAXPD 8 – 8 – nCK Mode register set command cycle time tMRD 2 – 2 – nCK OCD drive mode output delay tOIT 0 12 0 12 ns 32 Minimum time clocks remains ON after CKE asynchronously drops LOW tDelay tIS + tCK(avg) + tIH – tIS + tCK(avg) + tIH – ns 15 |
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