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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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L99H92 Scheda tecnica(PDF) 56 Page - STMicroelectronics |
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L99H92 Scheda tecnica(HTML) 56 Page - STMicroelectronics |
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56 / 77 page  Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 2 Gate discharge current configuration bits for the full-bridge (INPMODE=0) or for leg 1 (INPMODE=1). SLEWD1[4:0]=n sets gate discharge current to n x IGMAX/31. Setting SLEWD1[4:0]=0 disables gate discharge current control and enables gate discharging through low impedance switches. SLEWD1[1] 1 SLEWD1[0] 0 P Parity bit Table 52. Control register GD1CR2 (0x05) MSB Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 0 (R) 0 (R) 0 (R) 0 (R) 0 (R/W) 0 (R/W) 0 (R/W) 0 (R) RES RES RES RES DSMON1[2] DSMON1[1] DSMON1[0] RES Reserved bit Reserved bit Reserved bit Reserved bit VDS monitoring threshold configuration bits Reserved bit Bit Name Description 15 RES Reserved 14 RES 13 RES 12 RES 11 DSMON1[2] VDS monitoring threshold configuration control bits for the full-bridge (INPMODE=0) or for leg 1 (INPMODE=1). 000=0.075V 001=0.15V 010=0.25V 011=0.4V 100=0.6V 101=0.8V 110=1V 111=1.2V 10 DSMON1[1] 9 DSMON1[0] 8 RES Reserved Table 53. Control register GD1CR2 (0x05) LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 (R/W) 0 (R/W) 0 (R/W) 0 (R) 0 (R/W) 0 (R/W) 0 (R) DSBT1[2] DSBT1[1] DSBT1[0] RES FT1[1] FT1[0] RES P VDS monitoring blanking time configuration bits Reserved bit VDS monitoring filtering time configuration bits Reserved bit Parity bit Bit Name Description 7 DSBT1[2] VDS monitoring blanking time configuration control bits for the full-bridge (INPMODE=0) or for leg 1 (INPMODE=1). Blanking time in µs = DSBT1[2:0] + 1 (min= 1us, max= 8us) 6 DSBT1[1] 5 DSBT1[0] 4 RES Reserved 3 FT1[1] VDS monitoring filtering time configuration control bits for the full-bridge (INPMODE=0) or for leg 1 (INPMODE=1). Filter time in µs = (FT1[1:0] + 1)*1.5 (min= 1.5us, max= 6us) 2 FT1[0] 1 RES Reserved L99H92 Control registers DS14069 - Rev 4 page 56/77 |
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