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L99H92 Scheda tecnica(PDF) 24 Page - STMicroelectronics |
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L99H92 Scheda tecnica(HTML) 24 Page - STMicroelectronics |
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24 / 77 page ![]() ROM Address Description Access Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 … 20H <SPI CPHA test> R → 0 1 0 1 0 1 0 1 16H <WD bit pos. 4> R → 00H 15H <WD bit pos. 3> R → 00H 14H <WD bit pos. 2> R → 00H 13H <WD bit pos. 1> R → 49H 12H <WD Type 2> R → A4H 11H <WD Type 1> R → 4AH 10H <SPI mode> R → A1H … → 0AH <Silicon Ver.> R → major revision minor revision … → 05H <Device No.4> R → 4CH 04H <Device No.3> R → 36H 03H <Device No.2> R → 52H 02H <Device No.1> R → 55H 01H <Device Family> R → 01H 00H <Company Code> R → 00H Device identification registers These registers represent a unique signature to identify the device and silicon version. <Company Code>: 00H (STMicroelectronics) <Device Family>: 01H (BCD Power Management) <Device No. 1>: 55H (ASCII code for U) <Device No. 2>: 52H (ASCII code for R) <Device No. 3>: 36H (ASCII code for 6) <Device No. 4>: 4CH (ASCII code for L) SPI modes By reading out the <SPI Mode> register, general information of the device SPI can be read. Table 12. SPI mode registers Bit7 Bit6 Bit5 Bit 4 Bit 3 Bit 2 Bit1 Bit0 BR DL2 DL1 DL0 0 0 S1 S0 1 0 1 0 0 0 0 1 <SPI Mode>: A1H (Burst Mode read available, 24 bit SPI frame, parity error check) SPI burst read Table 13. Burst read bit Bit 7 Description 0 BR not available 1 BR available L99H92 ST SPI 4.1 DS14069 - Rev 4 page 24/77 |
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