L99H92 datasheet(16/77 Pages) STMICROELECTRONICS

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2.11

Window watchdog (WDG)

Out of standby mode, the L99H92 watchdog monitors the microcontroller status within a periodic window.

By default, as soon as the device enters in active mode, the watchdog is enabled and starts running with a long

open window (tLOW). The long open window provides more time to the microcontroller for the L99H92 initialization

and allows the watchdog disabling procedure to be run, when no watchdog is required by the application. To

trigger the watchdog for the first time during a Long Open Window (LOW), the microcontroller has to write 5555h

to the watchdog trigger/disable register (WDGTRDIS) before the end of the long open window. After the first valid

watchdog trigger, the watchdog will enter in window mode. In window mode the microcontroller has to serve the

watchdog by alternating the watchdog trigger bits (that is, 2AAAh,5555h,…) of the watchdog trigger/disable

will immediately start a new window.

In case of a watchdog failure (root cause can be any watchdog trigger outside the open window; invalid or

unexpected watchdog trigger bits value; any watchdog timeout; any disabling procedure out of the LOW; any

wrong disabling procedure during the LOW) will set the WDGF flag, stop the watchdog and put the device in fail-

safe mode. In fail-safe mode the OUTE control bit is reset and the gate drivers are forced in sink switch mode to

switch off actively all the MOSFETs with the maximum available current, regardless of the programmed gate

discharge current (SLEWDx control bits). To reactivate the gate drivers that are forced in sink switch mode, the

WDGF flag has to be cleared via SPI (clearing the WDGF flag makes the device come out of the fail-safe mode

and makes the watchdog start again with a long open window) and then the OUTE control bit has to be set to one

via SPI. As long as the device is in fail-safe mode (WDGF=1), the OUTE control bit is reset and cannot be set via

SPI. Once the watchdog starts running again with a long open window after coming out of the fail-safe mode, to

enter in window mode the microcontroller has to write 5555h to the watchdog trigger/disable register

(WDGTRDIS). To disable the watchdog, the microcontroller has to write a specific key, consisting in two

consecutive valid SPI frames to be sent in the right order, to control register WDGTRDIS before the end of any

long open window. Just one attempt to disable the watchdog is allowed per LOW, if not successful, a watchdog

fault is generated, and it will no longer be possible to disable the watchdog until the next LOW. Any other SPI

transfer between the two SPI frames carrying the key including an invalid SPI transfer generating an SPIE aborts

the disable process and generates a watchdog fault (WDGF). Besides, the keys sent in the wrong order will not

disable the watchdog and generate a watchdog fault as well. Once in window mode, it will no longer be possible

to disable the watchdog until the next LOW. Any attempt to disable the watchdog outside the LOW will generate a

watchdog fault (WDGF).

Any read access to the WDGTRDIS register provides information concerning the watchdog disabling procedure

result together with the three least significant bits of the latest write operation performed on the same register.

Figure 11. Watchdog state diagram

GADG120920220943SA

L99H92

Window watchdog (WDG)

DS14069 - Rev 4

page 16/77

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