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L99H92 Scheda tecnica(PDF) 57 Page - STMicroelectronics

Il numero della parte L99H92
Spiegazioni elettronici  Half-bridge pre-driver for automotive applications
PDF  77 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L99H92 Scheda tecnica(HTML) 57 Page - STMicroelectronics

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Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
P
Parity bit
Table 54. Control register GD2CR1 (0x06) MSB
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
SLEWC2[4] SLEWC2[3]
SLEWC2[2]
SLEWC2[1]
SLEWC2[0]
DT2[3]
DT2[2]
DT2[1]
Gate charge current configuration bits
Dead-time configuration bits
Bit
Name
Description
15
SLEWC2[4]
Gate charge current configuration bits for the leg 2 in case INPMODE are set. These bits have no
effect if INPMODE is reset.
SLEWC2[4:0]=n sets gate charge current to n x IGMAX/31. Setting SLEWC2[4:0]=0 disables gate
charge current control and enables gate charging through low impedance switches.
14
SLEWC2[3]
13
SLEWC2[2]
12
SLEWC2[1]
11
SLEWC2[0]
10
DT2[3]
Dead-time configuration bits for the leg 2 in case INPMODE is set. These bits have no effect if
INPMODE is reset.
0000=250ns
0001=500ns
0010=750ns
0011=1000ns
0100=1250ns
…
1110=3750ns
1111=4000ns
9
DT2[2]
8
DT2[1]
Table 55. Control register GD2CR1 (0x06) LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0 (R/W)
0 (R)
0 (R)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
DT2[0]
RES
SLEWD2[4]
SLEWD2[3]
SLEWD2[2]
SLEWD2[1]
SLEWD2[0]
P
Dead-time
configuration
bit
Reserved
bit
Gate discharge current configuration bits
Parity bit
Bit
Name
Description
7
DT2[0]
Dead-time configuration control bit for the leg 2 in case INPMODE is set. This bit has no effect if
INPMODE is reset.
6
RES
Reserved
5
SLEWD2[4]
Gate discharge current configuration bits for the leg 2 in case INPMODE is set. These bits have
no effect if INPMODE is reset.
SLEWD2[4:0]=n sets gate discharge current to n x IGMAX/31. Setting SLEWD2[4:0]=0 disables
gate discharge current control and enables gate discharging through low impedance switches.
4
SLEWD2[3]
3
SLEWD2[2]
2
SLEWD2[1]
1
SLEWD2[0]
0
P
Parity bit
L99H92
Control registers
DS14069 - Rev 4
page 57/77



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