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L99H92 Scheda tecnica(PDF) 61 Page - STMicroelectronics

Il numero della parte L99H92
Spiegazioni elettronici  Half-bridge pre-driver for automotive applications
PDF  77 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
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L99H92 Scheda tecnica(HTML) 61 Page - STMicroelectronics

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Table 62. Watchdog trigger/disable register WDGTRDIS (0x0A) MSB
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Register write access
WDGTRDIS[14] WDGTRDIS[13] WDGTRDIS[12]
WDGTRDIS[11]
WDGTRDIS[10]
WDGTRDIS[9]
WDGTRDIS[8] WDGTRDIS[7]
Watchdog trigger/disable bits
Bit
Name
Description
15
WDGTRDIS[14]
The register can be used either to disable the watchdog or to trigger the watchdog
Watchdog trigger/disable bits. In order to trigger the watchdog all the register bits must toggle
within the watchdog open window. The first trigger word must be 5555h, this value puts an end to
the watchdog long open window and turn the watchdog in window mode. The following trigger
values must be 2AAAh, 5555h, 2AAAh and so on.
To disable the watchdog, the microcontroller has to send a specific key, consisting in two
consecutive words, corresponding to two consecutive valid SPI transfers (without any other SPI
transfer between the two of them), during any watchdog long open window. The keys to disable
the watchdog are 2F6Bh (first key word) and 1097h (second key word). The two words key has to
be sent in the right order, otherwise the watchdog will not be disabled, and a watchdog fault will
be generated.
First trigger bits value (5555h): 101010101010101b
Second trigger bits value (2AAAh): 010101010101010b
First part of the disable key (2F6Bh): 010111101101011b
Second part of the disable key (1097h): 001000010010111b
14
WDGTRDIS[13]
13
WDGTRDIS[12]
12
WDGTRDIS[11]
11
WDGTRDIS[10]
10
WDGTRDIS[9]
9
WDGTRDIS[8]
8
WDGTRDIS[7]
Table 63. Watchdog trigger/disable register WDGTRDIS (0x0A) LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register write access
WDGTRDIS[6] WDGTRDIS[5] WDGTRDIS[4]
WDGTRDIS[3]
WDGTRDIS[2]
WDGTRDIS[1]
WDGTRDIS[0]
P
Watchdog trigger/disable bits
Parity bit
Bit
Name
Description
7
WDGTRDIS[6] The register can be used either to disable the watchdog or to trigger the watchdog
Watchdog trigger/disable bits. In order to trigger the watchdog all the register bits must toggle within the
watchdog open window. The first trigger word must be 5555h, this value puts an end to the watchdog turn
open window and turn the watchdog in window mode. The following trigger values must be 2AAAh, 5555h,
2AAAh and so on.
In order to disable the watchdog, the microcontroller has to send a specific key, consisting in two consecutive
words, corresponding to two consecutive valid SPI transfers (without any other SPI transfer between the two
of them), during any watchdog long open window. The keys to disable the watchdog are 2F6Bh (first key
word) and 1097h (second key word). The two words key has to be sent in the right order, otherwise the
watchdog will not be disabled and a watchdog fault will be generated.
First trigger bits value (5555h): 101010101010101b
Second trigger bits value (2AAAh): 010101010101010b
First part of the disable key (2F6Bh): 010111101101011b
Second part of the disable key (1097h): 001000010010111b
6
WDGTRDIS[5]
5
WDGTRDIS[4]
4
WDGTRDIS[3]
3
WDGTRDIS[2]
2
WDGTRDIS[1]
1
WDGTRDIS[0]
0
P
Parity bit
Table 64. Watchdog trigger/disable register WDGTRDIS (0x0A) MSB
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Register Read Access
0 (R)
0 (R)
0 (R)
0 (R)
0 (R)
0 (R)
0 (R)
0 (R)
RES
RES
RES
RES
RES
RES
RES
RES
L99H92
Control registers
DS14069 - Rev 4
page 61/77



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