L99H92 datasheet(76/77 Pages) STMICROELECTRONICS

76 / 77 page

List of figures

Figure 1.

Block diagram .................................................................... 3

Figure 2.

Pinout - TQFP32................................................................... 3

Figure 3.

Pinout - QFN 32 ................................................................... 4

Figure 4.

NRDY status bit and CPLOW flag ....................................................... 9

Figure 5.

Full-bridge GSHx and GSLx slopes ..................................................... 11

Figure 6.

Full-bridge drain-source monitoring diagnosis .............................................. 12

Figure 7.

Full-bridge open-load detection (no open-load detected) ...................................... 13

Figure 8.

Full-bridge open-load-detection (open-load detected) ........................................ 13

Figure 9.

Full-bridge open-load-detection (short to ground detected) ..................................... 13

Figure 10.

Full-bridge open-load-detection (short to VDH detected) ...................................... 14

Figure 11.

Watchdog state diagram ............................................................ 16

Figure 12.

Application schematic .............................................................. 17

Figure 13.

SPI pins description ............................................................... 19

Figure 14.

SPI signal description .............................................................. 19

Figure 15.

SDI frame ...................................................................... 20

Figure 16.

SDO frame...................................................................... 21

Figure 17.

H-driver delay times ............................................................... 34

Figure 18.

IGHx, IGLx accuracy ................................................................ 34

Figure 19.

Watchdog early, late, and safe window .................................................. 39

Figure 20.

SPI transfer timing diagram .......................................................... 41

Figure 21.

SPI input timing .................................................................. 42

Figure 22.

SPI output timing ................................................................. 43

Figure 23.

SPI CSN output timing.............................................................. 44

Figure 24.

SPI CSN low to high transition and global status bit access .................................... 44

Figure 25.

Operating modes ................................................................. 45

Figure 26.

QFN32L 5x5 mm package outline ...................................................... 66

Figure 27.

TQFP32L 7x7 mm package outline ..................................................... 68

Figure 28.

TQFP32L 7x7 mm footprint .......................................................... 70

L99H92

List of figures

DS14069 - Rev 4

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