| Motore di ricerca datesheet componenti elettronici |
|
L99H92 Scheda tecnica(PDF) 20 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L99H92 Scheda tecnica(HTML) 20 Page - STMicroelectronics |
|
20 / 77 page ![]() The first two transmitted bits (MSB, MSB-1) contain the operation code, which represents the command/ instruction that will be performed. The following 6 bits (MSB-2 to MSB-7) represent the address on which the command/operation will be performed. The subsequent two bytes contain the payload. Figure 15. SDI frame GADG120920221006SA OC1 OC0 A5 A4 A3 A2 A1 A0 15 14 13 12 11 10 9 7 6 5 4 3 2 1 0 OPCODE ADDRESS DATA Byte 2 DATA Byte 1 8 MSB LSB time time time 23 22 21 20 19 18 17 DATA Byte 3 16 time Operating code The operating code is used to distinguish between different commands/operations on registers of the slave device. Table 5. Operation codes OC1 OC0 Description 0 0 Write command 0 1 Read command 1 0 Read & Clear command 1 1 Read device information command Any Write command (with no parity error, no wrong address and no CLK count error) will modify the content of the addressed control register with the payload. Besides this, a shift out of the content (data present at Communication Start) of the addressed register is performed. A Read command shifts out the data present in the addressed register at Communication Start. The payload data is ignored, and the data of the addressed register will not be modified. Moreover, a Burst Read can be performed. A Read & Clear command (with no parity error, no wrong address and no CLK count error) will lead to a clear of addressed status bits. The bits to be cleared are defined first by address, second by payload bits set to ‘1’. Besides this, a shift out of the content (data present at Communication Start) of the register is performed. Note: to avoid any loss of any reported status, it is recommended to clear just the status register bits, which are already reported in the previous communication frame (Selective Bitwise Clear). Advanced operation codes Two Advanced Operation Codes can be used to set all control registers to the default value and to clear all status registers by one single SPI frame respectively. A ‘set all control registers to default’ command is launched when an SPI frame with OpCode ‘11’ and address ’111111’ is sent to the device. A ‘clear all status registers’ command is launched when an SPI frame with OpCode ‘10’ and address’111111’ is sent to the device. Data-in payload The Payload (Data Byte 1 to Data Byte 2) is the data transferred to the device with every SPI communication. The Payload always follows the OpCode and the Address bits. L99H92 ST SPI 4.1 DS14069 - Rev 4 page 20/77 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |