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L99H92 Scheda tecnica(PDF) 22 Page - STMicroelectronics |
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L99H92 Scheda tecnica(HTML) 22 Page - STMicroelectronics |
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22 / 77 page ![]() • Functional error bit (FE) The FE bit is a logical OR combination of errors coming from application specific functional items: Overcurrent status flags (DSHSx, DSLSx) Device error bit (DE) The DE bit is a logical OR combination of errors related to device specific blocks: • VDH overvoltage status flag (VDHOV) • VDH undervoltage status flag (VDHUV) • VDD overvoltage status flag (VDDOV) • Thermal shutdown status flag (TSD) • Charge pump not ready status bit (NRDY) • Charge pump low status flag/bit (CPLOW) • Digital input/output overvoltage status flag (DIOOV) Global warning bit (GW). The GW bit is a logical OR combination of all warning flags: • Thermal warning status flag (TW) • VS overvoltage warning status flag (VSOVW) Fail-safe bit (FS). The FS bit indicates that the device was forced into fail-safe mode due to watchdog failure or due to FSINB input pin pulled low. • Watchdog fault status flag (WDGF) • Fail-safe input not status bit (FSIN) Data-out payload The Payload (data Byte1 and 2) is the data transferred from the slave device with every SPI communication to the master device (in-frame-response). The Payload always follows the global status byte. 4.1.4 Address definition Table 7. Address definition - device application access Device application access Operating code OC1 OC0 0 0 0 1 1 0 Table 8. Address definition - device information read access Device information read access Operating code OC1 OC0 1 1 Table 9. Address definition - RAM access RAM address Description Access 3FH Advanced Op. C 3EH Reserved None ... ... ... ... ... ... L99H92 ST SPI 4.1 DS14069 - Rev 4 page 22/77 |
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