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H8S/2214 Scheda tecnica(PDF) 636 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 636 Page - Renesas Technology Corp |
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636 / 936 page ![]() Section 15 ROM Rev.4.00 Sep. 18, 2008 Page 576 of 872 REJ09B0189-0400 15.10 Protection There are three kinds of flash memory program/erase protection: hardware protection, software protection, and error protection. 15.10.1 Hardware Protection Hardware protection refers to a state in which programming/erasing of flash memory is forcibly disabled or aborted. Hardware protection is reset by settings in flash memory control register 1 (FLMCR1), flash memory control register 2 (FLMCR2), erase block register 1 (EBR1), and erase block register 2 (EBR2). The FLMCR1, FLMCR2, EBR1, and EBR2 settings are retained in the error-protected state. (See table 15.10) Table 15.10 Hardware Protection Functions Item Description Program Erase FWE pin protection • When a low level is input to the FWE pin, FLMCR1, FLMCR2, (except bit FLER) EBR1, and EBR2 are initialized, and the program/erase-protected state is entered. Yes Yes Reset/standby protection • In a power-on reset (including a WDT power-on reset) and in standby mode, FLMCR1, FLMCR2, EBR1, and EBR2 are initialized, and the program/erase- protected state is entered. • In a reset via the RES pin, the reset state is not entered unless the RES pin is held low until oscillation stabilizes after powering on. In the case of a reset during operation, hold the RES pin low for the RES pulse width specified in the AC Characteristics section. Yes Yes |
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