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7480 Group and 7481 Group User's Manual

1-117

1.14 Serial I/O

HARDWARE

(2)

Operations of Clock Synchronous Serial I/O Transmission

Transmit Operation

When transmit data is written to the transmit buffer register (Note 1), the transmit buffer empty flag

of the serial I/O status register is cleared to ‘0’.

The transmit data written to the transmit buffer register is transferred to the transmit shift register.

When the data transfer to the transmit shift register is completed, the transmit buffer empty flag

goes to ‘1’ (Note 2).

In this instance, when the BRG output/4 is selected as the synchronous clock, 8 synchronous clock

pulses are generated.

Synchronized with a falling edge of the synchronous clock, the least significant bit (LSB) of the

transmit data transferred to the transmit shift register is output from the TxD pin. At this time, the

contents of the transmit shift register are shifted to the low-order direction by one bit, and the

transmit shift completion flag is cleared to ‘0’.

By repeating the shift operation of ‘Transmit Operation ’ 8 times, 8-bit transmit data is output from

the TxD pin by the bit from the LSB.

When 8 bits of the transmit data are output by the 8 shift operations, the transmit shift completion

flag is set to ‘1’ (Note 3).

Notes 1: When the external clock is selected as the synchronous clock, write the transmit data to

the transmit buffer register during the HIGH state of the synchronous clock.

2: When the transmit buffer empty flag is ‘1’, the next transmit data can be written to the

transmit buffer register.

3: The supply of the synchronous clock pulse to the transmit shift register stops automatically

upon transmit completion when the BRG output/4 is selected as the synchronous clock.

However, when the next transmit data is written to the transmit buffer register during the

‘0’ state of the transmit shift completion flag, the supply of the synchronous clock pulse

continues, and data is successively transmitted.

When the external clock is selected as the synchronous clock, shift operation continues as

long as the external clock is being input. Therefore, it is necessary to stop the external

clock after transmission is completed.

Serial I/O Transmit Interrupt

In the following cases, the serial I/O transmit interrupt request bit of interrupt request register 1 is

set to ‘1’: then the interrupt request is generated.

• When the transmit interrupt source selection bit is ‘0’, and the data written to the transmit buffer

• When the transmit interrupt source selection bit is ‘1’, and the shift operation of the transmit shift

Figure 1.14.9 shows the transmit operation of clock synchronous serial I/O. The numbers in the figure

corresponds to those of the above-mentioned ‘Transmit Operation’.

Figure 1.14.10 shows a transmit timing of clock synchronous serial I/O.

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