7480 datasheet(135/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

1-118

1.14 Serial I/O

HARDWARE

Figure 1.14.10 Transmit Timing of Clock Synchronous Serial I/O

Figure 1.14.9 Transmit Operation of Clock Synchronous Serial I/O

Transmit buffer register

Address 00E016

Serial I/O status register

Address 00E116

Writing transmit data

Transmit shift register

Transferring transmit data

Transmit buffer register

Address 00E016

D7 D6 D5 D4 D3 D2 D1

Synchronous clock

P15/TxD

Transmit shift register

Transmit buffer empty flag

D7 D6 D5 D4 D3 D2 D1

Synchronous clock

P15/TxD

Transmit shift register

Synchronous clock

P15/TxD

Transmit shift completion flag

Transmit buffer empty flag

Transmit shift register

Data bus

Serial I/O status register

Address 00E116

Serial I/O status register

Address 00E116

Serial I/O status register

Address 00E116

Synchronous clock

TxD pin

Transmit buffer empty flag

Transmit shift completion flag

Serial I/O transmit

interrupt request bit

(Note 1)

Transmit buffer register

write signal

SRDY pin

Clearing by writing ‘0’ to the serial I/O transmit interrupt request bit or

accepting a serial I/O transmit interrupt request.

A :

Notes 1: When the transmit interrupt source selection bit is ‘0’ (transmit buffer is emptied).

2: When the transmit interrupt source selection bit is ‘1’ (transmit shift operation is completed).

(Note 2)

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