R7FA2L1AB2DFN datasheet(3/110 Pages) RENESAS

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Table 1.3

System (2 of 2)

Feature

Functional description

Clock Frequency Accuracy

Measurement Circuit (CAC)

The Clock Frequency Accuracy Measurement Circuit (CAC) counts pulses of the clock to be

measured (measurement target clock) within the time generated by the clock selected as the

measurement reference (measurement reference clock), and determines the accuracy

depending on whether the number of pulses is within the allowable range.When measurement is

complete or the number of pulses within the time generated by the measurement reference clock

is not within the allowable range, an interrupt request is generated.

Interrupt Controller Unit (ICU)

The Interrupt Controller Unit (ICU) controls which event signals are linked to the Nested Vector

Interrupt Controller (NVIC), and the Data Transfer Controller (DTC) modules. The ICU also

controls non-maskable interrupts.

Key Interrupt Function (KINT)

The key interrupt function (KINT) is generated a key interrupt by detecting a valid edge on the

key interrupt input pin.

Low power modes

Power consumption can be reduced in multiple ways, including setting clock dividers, stopping

modules, selecting power control mode in normal operation, and transitioning to low power

modes.

The register write protection function protects important registers from being overwritten due to

software errors. The registers to be protected are set with the Protect Register (PRCR).

Memory Protection Unit (MPU)

The MCU has four Memory Protection Units (MPUs) and a CPU stack pointer monitor function

are provided.

Watchdog Timer (WDT)

The Watchdog Timer (WDT) is a 14-bit down counter that can be used to reset the MCU when

the counter underflows because the system has run out of control and is unable to refresh the

WDT. In addition, the WDT can be used to generate a non-maskable interrupt or an underflow

interrupt or watchdog timer reset.

Independent Watchdog Timer (IWDT)

The Independent Watchdog Timer (IWDT) consists of a 14-bit down counter that must be

serviced periodically to prevent counter underflow. The IWDT provides functionality to reset the

MCU or to generate a non-maskable interrupt or an underflow interrupt. Because the timer

operates with an independent, dedicated clock source, it is particularly useful in returning the

MCU to a known state as a fail-safe mechanism when the system runs out of control. The IWDT

can be triggered automatically by a reset, underflow, refresh error, or a refresh of the count value

in the registers.

Table 1.4

Event link

Feature

Functional description

Event Link Controller (ELC)

The Event Link Controller (ELC) uses the event requests generated by various peripheral

modules as source signals to connect them to different modules, allowing direct link between the

modules without CPU intervention.

Table 1.5

Direct memory access

Feature

Functional description

Data Transfer Controller (DTC)

A Data Transfer Controller (DTC) module is provided for transferring data when activated by an

interrupt request.

Table 1.6

Timers (1 of 2)

Feature

Functional description

General PWM Timer (GPT)

The General PWM Timer (GPT) is a 32-bit timer with GPT32 × 4 channels and a 16-bit timer with

GPT16 × 6 channels. PWM waveforms can be generated by controlling the up-counter, down-

counter, or the up- and down-counter. In addition, PWM waveforms can be generated for

controlling brushless DC motors. The GPT can also be used as a general-purpose timer.

Port Output Enable for GPT (POEG)

The Port Output Enable (POEG) function can place the General PWM Timer (GPT) output pins

in the output disable state

Low power Asynchronous General

Purpose Timer (AGT)

The low power Asynchronous General Purpose Timer (AGT) is a 16-bit timer that can be used

for pulse output, external pulse width or period measurement, and counting external events. This

timer consists of a reload register and a down counter. The reload register and the down counter

are allocated to the same address, and can be accessed with the AGT register.

RA2L1 Datasheet

1. Overview

R01DS0385EJ0100 Rev.1.00

Aug 06, 2020

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