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2.3.11

CLKOUT Timing

Table 2.34

CLKOUT timing

Parameter

Symbol

Min

Max

Unit

Test conditions

CLKOUT

CLKOUT pin output cycle*1

2.7 V ≤ VCC ≤ 5.5 V

tCcyc

62.5

—

Figure 2.36

1.8 V ≤ VCC < 2.7 V

125

—

1.6 V ≤ VCC < 1.8 V

250

—

CLKOUT pin high pulse

width*2

2.7 V ≤ VCC ≤ 5.5 V

tCH

—

1.8 V ≤ VCC < 2.7 V

—

1.6 V ≤ VCC < 1.8 V

150

—

CLKOUT pin low pulse

width*2

2.7 V ≤ VCC ≤ 5.5 V

tCL

—

1.8 V ≤ VCC < 2.7 V

—

1.6 V ≤ VCC < 1.8 V

150

—

CLKOUT pin output rise time

2.7 V ≤ VCC ≤ 5.5 V

tCr

—

1.8 V ≤ VCC < 2.7 V

—

1.6 V ≤ VCC < 1.8 V

—

CLKOUT pin output fall time

2.7 V ≤ VCC ≤ 5.5 V

tCf

—

1.8 V ≤ VCC < 2.7 V

—

1.6 V ≤ VCC < 1.8 V

—

Note 1. When the EXTAL external clock input or an oscillator is used with division by 1 (the CKOCR.CKOSEL[2:0] bits are 011b and the

CKOCR.CKODIV[2:0] bits are 000b) to output from CLKOUT, specifications in Table 2.34 should be satisfied with 45% to 55% of

input duty cycle.

Note 2. When MOCO is selected as the clock output source (the CKOCR.CKOSEL[2:0] bits are 001b), set the clock output division ratio to

be divided by 2 (the CKOCR.CKODIV[2:0] bits are 001b).

tCH

Test conditions: VOH = VCC × 0.7, VOL = VCC × 0.3, IOH = -1.0 mA, IOL = 1.0 mA, C = 30 pF

tCf

tCcyc

CLKOUT

tCr

tCL

Figure 2.36

CLKOUT output timing

RA2L1 Datasheet

2. Electrical Characteristics

R01DS0385EJ0100 Rev.1.00

Aug 06, 2020

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