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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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R7FA2L1AB2DFN Scheda tecnica(PDF) 80 Page - Renesas Technology Corp |
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R7FA2L1AB2DFN Scheda tecnica(HTML) 80 Page - Renesas Technology Corp |
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80 / 110 page  2.11.3 Serial Wire Debug (SWD) Table 2.59 SWD characteristics (1) Conditions: VCC = AVCC0 = 2.4 to 5.5 V Parameter Symbol Min Typ Max Unit Test conditions SWCLK clock cycle time tSWCKcyc 80 — — ns Figure 2.48 SWCLK clock high pulse width tSWCKH 35 — — ns SWCLK clock low pulse width tSWCKL 35 — — ns SWCLK clock rise time tSWCKr — — 5 ns SWCLK clock fall time tSWCKf — — 5 ns SWDIO setup time tSWDS 16 — — ns Figure 2.49 SWDIO hold time tSWDH 16 — — ns SWDIO data delay time tSWDD 2 — 70 ns Table 2.60 SWD characteristics (2) Conditions: VCC = AVCC0 = 1.6 to 2.4 V Parameter Symbol Min Typ Max Unit Test conditions SWCLK clock cycle time tSWCKcyc 250 — — ns Figure 2.48 SWCLK clock high pulse width tSWCKH 120 — — ns SWCLK clock low pulse width tSWCKL 120 — — ns SWCLK clock rise time tSWCKr — — 5 ns SWCLK clock fall time tSWCKf — — 5 ns SWDIO setup time tSWDS 50 — — ns Figure 2.49 SWDIO hold time tSWDH 50 — — ns SWDIO data delay time tSWDD 2 — 170 ns tSWCKH tSWCKf tSWCKcyc SWCLK tSWCKr tSWCKL Figure 2.48 SWD SWCLK timing RA2L1 Datasheet 2. Electrical Characteristics R01DS0385EJ0100 Rev.1.00 Aug 06, 2020 Page 80 of 110 |
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