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FS23 Scheda tecnica(PDF) 131 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 131 Page - NXP Semiconductors |
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131 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Report VSUP OV event 0 No VSUP overvoltage event 1 VSUP overvoltage event occurred 1 VSUP_OV_I POR, or clear on write (write '1') Report VSHS undervoltage event 0 No VSHS undervoltage event 1 VSHS undervoltage event occurred 2 VSHS_UV_I POR, or clear on write (write '1') Report VSHS overvoltage event 0 No VSHS overvoltage event 1 VSHS undervoltage event occurred 3 VSHS_OV_I POR, or clear on write (write '1') Report SPI request error due to writing or reading in an invalid register 0 No error 1 SPI request error reported 5 SPI_REQ_I POR, or clear on write (write '1') Report SPI clock error due to wrong number of clock pulses 0 No error 1 SPI clock error reported 6 SPI_CLK_I POR, or clear on write (write '1') Report SPI CRC error due to incorrect CRC calculation 0 No error 1 SPI CRC error reported 7 SPI_CRC_I POR, or clear on write (write '1') Report I2C request error due to writing or reading in an invalid register 0 No error 1 I2C request error reported 8 I2C_REQ_I POR, or clear on write (write '1') Report I2C CRC error due to incorrect CRC calculation 0 No error 1 I2C CRC error reported 9 I2C_CRC_I POR, or clear on write (write '1') Report VBOS undervoltage event 0 No event detected 1 VBOS UV occurred 11 VBOS_UV POR, or clear on write (write '1') Real-time status of the switch between VBOS and V1 0 The switch is opened 1 The switch is closed 12 VBOS2V1SW_S Real-time information Table 104. M_VSUP_COM_FLG register bit description...continued FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 131 / 230 |
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