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FS23 Scheda tecnica(PDF) 135 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 135 Page - NXP Semiconductors |
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135 / 230 page  NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Configure WAKE1 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 0 to 1 WK1_WUEN POR or Fail-safe state Configure WAKE2 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 2 to 3 WK2_WUEN POR or Fail-safe state Configure HVIO1 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 4 to 5 HVIO1_WUEN POR or Fail-safe state Configure HVIO2 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 6 to 7 HVIO2_WUEN POR or Fail-safe state Configure LVIO3 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 8 to 9 LVIO3_WUEN POR Configure LVIO4 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 10 to 11 LVIO4_WUEN POR Configure LVI5 wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 12 to 13 LVI5_WUEN POR Table 110. M_IOWU_EN register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 135 / 230 |
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